1. Field of Invention
The present invention relates to a process for the passivation of semiconductor devices and more particularly refers to a new and improved method of passivation by the application of a silicon layer.
2. Description of the Prior Art
The application of a polycrystalline silicon layer to a semiconductor device is shown in U.S. Pat. No. 3,971,061.
In semiconductor components a fundamental problem consists in maintaining stable the current-voltage characteristics. In the case of rectifiers and transistors, these are in particular the characteristics in the blocking direction, whereas in the case of thyristors attention should be paid to the stability of the characteristics both in the blocking direction and in the trigger direction. It is general prior art to passivate the surfaces of the semiconductor elements of the aforesaid semiconductor components by applying one or more than one organic or inorganic covering layer. The use of lacquers, rubbers or glasses is known for this purpose. Generally an adequate stability of the characteristics can be achieved with the aid of these covering layers. However, occasionally instabilities occur, the cause of which can be found in unrecognized changes in the properties of the covering layers and/or in the surface of the semiconductor element. During production this continuously leads to strong fluctuations in the yield of utilizable semiconductor components.
A process has been described by means of which a semiconductor element is passivated by a thermally growing silicon layer. This passivation process necessitates temperatures of between 600.degree. and 700.degree. C. which means that it cannot be employed in already contacted and possible soldered components. Furthermore the silicon must be etched away at the points at which it is not required. In addition, this process can lead to a considerable reduction in the carrier life time in volume and on the surface.